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IMP1232LP 数据表(PDF) 3 Page - IMP, Inc |
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IMP1232LP 数据表(HTML) 3 Page - IMP, Inc |
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3 / 7 page ![]() © 1999 IMP, Inc. 408-432-9100/www.impweb.com 3 IMP1 IMP1232LP/LPS 232LP/LPS Absolute Maximum Ratings Electrical Characteristics Voltage on VCC . . . . . . . . . . . . . . . . . . . . . . . . –0.5V to 7V Voltage on ST, TD . . . . . . . . . . . . . . . . . . . . . –0.5V to VCC + 0.5V Voltage on PBRST, RESET, RESET . . . . . . . . –0.5V to VCC + 0.5V Operating Temperature Range . . . . . . . . . . . –40 °C to 85°C (N/EMA version) 0 °C to 70°C Soldering Temperature . . . . . . . . . . . . . . . . . . 260 °C for 10 seconds Storage Temperature . . . . . . . . . . . . . . . . . . . –55 °C to 125°C Voltages measured with respect to ground. These are stress ratings only and functional operation is not implied. Parameter Symbol Conditions Min Typ Max Units Supply Voltage (VCC)VCC 4.5 5.5 V ST and PBRST Input High Level VIH 2VCC + 0.3V V ST and PBRST Input Low Level VIL – 0.3 0.8 V VCC Trip Point (TOL = GND) VCCTP 4.50 4.62 4.74 V VCC Trip Point (TOL = VCC)VCCTP 4.25 4.37 4.49 V Watchdog Time-Out Period tTD TD = GND 62.5 150 250 ms Watchdog Time-Out Period tTD TD = VCC 500 1200 2000 ms Watchdog Time-Out Period tTD TD floating 250 610 1000 ms Output Voltage VOH I = –500 µA, Note 3 VCC - 0.5V VCC - 0.1V V Output Current IOH Output = 2.4V , Note 2 – 8 –10 mA Output Current IOL Output = 0.4V, 10 mA Input Leakage IIL Note 1 –1.0 1.0 µA RESET Low Level VOL 0.4 V Internal Pull-Up Resistor Note 1 40 k Ω Operating Current (CMOS) ICC1 30 µA Input Capacitance CIN 5pF Output Capacitance COUT 10 pF PBRST Manual Reset tPB PBRST = VIL 20 ms Minimum Low Time Reset Active Time tRST 250 610 1000 ms ST Pulse Width tST Note 4 20 ns VCC Fail Detect to tRPD 58 µs RESET or RESET VCC Slew Rate tF 4.75V to 4.25V 300 µs PBRST Stable LOW to tPDLY 20 ms RESET and RESET Active VCC Detect to RESET or tRPU tRISE = 5µs 250 610 1000 ms RESET Inactive VCC Slew Rate tR 4.25V to 4.75V 0 ns Unless otherwise stated, 4.5V ≤ VCC ≤ 5.5V and over the operating temperature range of 0°C to +70°C (–40°C to +85°C for N/EMA devices). All voltages are referenced to ground. Notes: 1. PBRST is internally pulled HIGH to VCC through a nominal 40kΩ resistor. 2. RESET is an open drain output. 3. RESET remains within 0.5V of VCC on power-down until VCC falls below 2V. RESET remains within 0.5V of ground on power-down until VCC falls below 2.0V. 4. Must not exceed the minimum watchdog time-out period (tTD). The watchdog circuit cannot be disabled. To avoid a reset, ST must be strobed. |
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