4

408-432-9100/www.impweb.com

©

1999 IMP, Inc.

IMP1

232LP/LPS

Application Information

Supply Voltage Monitor

Reset Signal Polarity and Output Stage Structure

RESET is an active LOW signal. It is developed with an open

drain driver. If a pullup resistor is required, typical values are

10k

Ω to 50kΩ.

RESET is an active High signal developed by a CMOS push-pull

output stage and is the logical opposite to RESET.

Trip Point Tolerance Selection

RESET remain active for a minimum time period of 250ms.

level of 1.2V also.

Figure 1. Timing Diagram: Power Up

Figure 2. Timing Diagram: Power Down

1232_05.eps

4.75V

4.25V

RESET

RESET

Figure 3. Timing Diagram: Pushbutton Reset

RESET

RESET

PBRST

1232_08.eps

Figure 4. Application Circuit: Pushbutton Reset

1232_06.eps

PBRST

5V

1

TD

2

ST

TOL

IMP1232LP/LPS

µP

3

4

RESET

GND

8

7

6

5

RESET

RESET

4.75V

4.25V

RESET

RESET

1232_04.eps

Manual Reset Operation

Push-button switch input, PBRST, allows the user to override the

internal trip point detection circuits and issue reset signals. The

pushbutton input is debounced and is normally pulled HIGH

through an internal 40k

Ω resistor.

become active and remain active for approximately a minimum

time period of 250ms after PBRST returns HIGH.

The debounced input is guaranteed to recognize pulses greater

than 20ms. No external pull-up resistor is required, since PBRST

is pulled HIGH by an internal 40k

Ω resistor.

The PBRST can be driven from a TTL or CMOS logic line or short-

ed to ground with a mechanical switch.

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