PRELIMINARY

1

80296SA COMMERCIAL CHMOS 16-BIT MICROCONTROLLER

1.0

PRODUCT OVERVIEW

of linear address space, a demultiplexed bus, and a chip-select unit. The external bus can dynamically switch

between multiplexed and demultiplexed operation. The device has hardware and instructions to support

various digital signal processing algorithms.

Figure 1. 80296SA Block Diagram

Code/Data

RAM

(2 Kbytes)

Port 3

Bus Control Signals

A19:16

AD15:0

SIO

Baud-

rate

Generator

EPA

Timer 1

Timer 2

Port 1

Port 4

PWM

Port 2

Source 2 Addr (24)

Source 2 Data (16)

Bus

Controller

A15:0

Source 1 Addr (24)

Source 1 Data (16)

Destination Addr (24)

Destination Data (16)

A3175-02

Aligner

Chip-select

Unit

Peripheral

Bus

Interface

Memory

Interface

Unit

Register File

(3-port RAM)

Instruction

Sequencer

Queue

ALU

Interrupt

Controller

Memory Data Bus (16)

Memory Addr Bus (24)