80960KA datasheet(2/43 Pages) INTEL

2 / 43 page

1.0 THE i960® PROCESSOR ................................ 1

1.1. Key Performance Features .......................... 2

1.1.1. Memory Space And Addressing Modes . 4

1.1.2. Data Types ............................................. 4

1.1.3. Large Register Set ................................. 4

1.1.4. Multiple Register Sets ............................ 5

1.1.5. Instruction Cache ................................... 5

1.1.6. Register Scoreboarding ......................... 5

1.1.7. High Bandwidth Local Bus ..................... 6

1.1.8. Interrupt Handling ................................... 6

1.1.9. Debug Features ..................................... 6

1.1.10. Fault Detection ..................................... 7

1.1.11. Built-in Testability ................................. 7

1.1.12. CHMOS ................................................ 7

2.0 ELECTRICAL SPECIFICATIONS .................. 10

2.1. Power and Grounding ................................ 10

2.2. Power Decoupling Recommendations ....... 10

2.3. Connection Recommendations .................. 11

2.4. Characteristic Curves ................................. 11

2.5. Test Load Circuit ........................................ 14

2.6. Absolute Maximum Ratings ....................... 15

2.7. DC Characteristics ..................................... 15

2.8. AC Specifications ....................................... 16

2.8.1. AC Specification Tables ....................... 17

3.0 MECHANICAL DATA ..................................... 21

3.1. Packaging .................................................. 21

3.1.1. Pin Assignment .................................... 21

3.2. Pinout ......................................................... 25

3.3. Package Thermal Specification ................. 29

4.0. WAVEFORMS ............................................... 33

5.0. REVISION HISTORY ..................................... 38

FIGURES

Figure 1.

The 80960KA Processor’s Highly

Parallel Architecture ............................ i

Figure 2.

80960KA Programming

Environment ........................................ 1

Figure 3.

Instruction Formats ............................. 4

Figure 4.

Multiple Register Sets Are Stored

On-Chip ............................................... 6

Figure 5.

Connection Recommendations

for Low Current Drive Network .......... 11

Figure 6.

Connection Recommendations

for High Current Drive Network ......... 11

Figure 7.

Typical Supply Current vs.

Case Temperature ............................ 12

Figure 8.

Typical Current vs. Frequency

(Room Temp) .................................... 12

Figure 9.

Typical Current vs. Frequency

(Hot Temp) ........................................ 13

Figure 10.

Worst-Case Voltage vs. Output

Current on Open-Drain Pins .............. 13

Figure 11.

Capacitive Derating Curve ................ 13

Figure 12.

Test Load Circuit for Three-State

Output Pins ...................................... 14

Figure 13.

Test Load Circuit for Open-Drain

Output Pins ...................................... 14

Figure 14.

Drive Levels and Timing Relationships

for 80960KA Signals ......................... 16

Figure 15.

Processor Clock Pulse (CLK2) .......... 20

Figure 16.

RESET Signal Timing ....................... 20

Figure 17.

32-Lead Pin-Grid Array

(PGA) Package ................................. 21

Figure 18.

80960KA PGA Pinout—View from

Bottom (Pins Facing Up) ................... 22

Figure 19.

80960KA PGA Pinout—View from

Top (Pins Facing Down) .................... 23

Figure 20.

80960KA 132-Lead Plastic Quad

Flat-Pack (PQFP) Package ............... 23

Figure 21.

PQFP Pinout - View From Top .......... 24

Figure 22.

HOLD Timing .................................... 30

Figure 23.

16 MHz Maximum Allowable

Ambient Temperature ....................... 31

80960KA

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