82527

PIN DESCRIPTION

The 82527 pins are described in this section Table 1 presents the legend for interpreting the pin types

Table 1 Pin Type Legend

Symbol

Description

I

Input only pin

O

Output only pin

IO

Pin can be either input or output

PIN DESCRIPTIONS

Pin Name

Pin Type

Pin Description

Ground

Provides digital ground

Ground

Provides ground for analog comparator

Power

POWER connection must be connected externally to a5V DC Provides power

for entire device

XTAL1

I

Input for an external clock XTAL1 (along with XTAL2) are the crystal

connections to an internal oscillator

XTAL2

O

Push-pull output from the internal oscillator XTAL2 (along with XTAL1) are the

crystal connections to an internal oscillator If an external oscillator is used

XTAL2 must be floated or not be connected XTAL2 must not be used as a

clock output to drive other CPUs

CLKOUT

O

Programmable clock output This output may be used to drive the oscillator of

the host microcontroller

RESET

I

is asserted) RESET

must be

driven to a valid low level for 1 ms minimum

is asserted) RESET

falling edge on the reset pin is required during a cold reset event

CS

I

A low level on this pin enables CPU access to the 82527 device

INT

O

the power supply for the ISO low speed physical layer The function of this pin is

O

determined by the MUX bit in the CPU Interface Register (Address 02H) as

follows

MUX e 0 pin 24 (PLCC) e INT

RX0

I

Inputs from the CAN bus line(s) to the input comparator A recessive level is

RX1

I

CoBy bit (Bus Configuration register) is programmed as a ‘‘1’’ the input

comparator is bypassed and RX0 is the CAN bus line input

TX0

O

Serial data push-pull output to the CAN bus line During a recessive bit TX0 is

high and TX1 is low During a dominant bit TX0 is low and TX1 is high

TX1

O

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