M80C196KB

IO register expansion on the new CHMOS members of the MCS-96 family has been provided by making two

register windows available Switching between these windows is done using the Window Select Register

(WSR) The PUSHA and POPA instructions can be used to push and pop the WSR and second interrupt mask

when entering or leaving interrupts so it is easy to change between windows

On the M80C196KB only Window 0 and Window 15 are active Window 0 is a true superset of the standard

8096 SFR space while Window 15 allows the read-only registers to be written and write-only registers to be

read The only major exception to this is the Timer2 register which is the Timer2 capture register in Window 15

The writeable register for Timer2 is in Window 0 There are also some minor changes and cautions The

descriptions of the registers which have different functions in Window 15 than in Window 0 are listed below

AD

COMMAND (02H)

Read the last written command

AD

RESULT (02H 03H)

Write a value into the result register

HSI

MODE (03H)

Read the value in HSI

MODE

HSI

TIME (04H05H)

Write to FIFO Holding register

HSO

TIME (04H05H)

Read the last value placed in the holding register

HSI

STATUS (06H)

Write to status bits but not to HSI pin bits (Pin bits are 1357)

HSO

COMMAND (06H)

Read the last value placed in the holding register

SBUF(RX) (07H)

Write a value into the receive buffer

SBUF(TX) (07H)

Read the last value written to the transmit buffer

WATCHDOG(0AH)

Read the value in the upper byte of the WDT

TIMER1 (0AH0BH)

Write a value to Timer1

TIMER2 (0CH0DH)

ReadWrite the Timer2 capture register

Note that Timer2 readwrite is done with WSRe0

IOC2 (0BH)

Last written value is readable except bit 7 (note 1)

BAUD

RATE (0EH)

No function cannot be read

PORT0 (0EH)

No function no output drivers on the pins Register reserved

PORT1

IOPORT1 cannot be read or written in Window 15 Register reserved

SP

STAT (11H)

Set the status bits TI and RI can be set but it will not cause an interrupt

SP

CON (11H)

Read the current control byte

IOS0 (15H)

Writing to this register controls the HSO pins Bits 6 and 7 are inactive for writes

IOC0 (15H)

Last written value is readable except bit 1 (note 1)

IOS1 (16H)

Writing to this register will set the status bits but not cause interrupts Bits 6 and

7 are not functional

IOC1 (16H)

Last written value is readable

IOS2 (17H)

Writing to this register will set the status bits but not cause interrupts

PWM

CONTROL (17H)

Read the duty cycle value written to PWM

CONTROL

NOTE

1 IOC27 (CAM CLEAR) and IOC01 (T2RST) are not latched and will read as a 1 (precharged bus)

Being able to write to the read-only registers and vice-versa provides a lot of flexibility One of the most useful

advantages is the ability to set the timers and HSO lines for initial conditions other than zero

Reserved registers may be used for testing as future features Do not write to these registers Read from

reserved registers will return indeterminate values

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