IP82C84A datasheet(5/10 Pages) INTERSIL

5 / 10 page

4-291

Absolute Maximum Ratings

Thermal Information

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8.0V

Input, Output or I/O Voltage . . . . . . . . . . . GND -0.5V to VCC +0.5V

ESD Classiﬁcation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1

Operating Conditions

Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V

Operating Temperature Range

C82C84A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +70oC

I82C84A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC

M82C84A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC

Thermal Resistance . . . . . . . . . . . . . . . .

θJA (oC/W) θJC (oC/W)

CERDIP Package . . . . . . . . . . . . . . . .

CLCC Package . . . . . . . . . . . . . . . . . .

PDIP Package . . . . . . . . . . . . . . . . . . .

N/A

PLCC Package . . . . . . . . . . . . . . . . . .

N/A

Storage Temperature Range . . . . . . . . . . . . . . . . . .-65oC to +150oC

Max Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC

(PLCC - Lead Tips Only)

Die Characteristics

Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Gates

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

DC Electrical Speciﬁcations VCC = +5.0V ±10%,

TA = 0

oC to +70oC (C82C84A),

TA = -40

oC to +85oC (I82C84A),

TA = -55

oC to +125oC (M82C84A)

SYMBOL

PARAMETER

MIN

MAX

UNITS

TEST CONDITIONS

VIH

Logical One Input Voltage

2.0

2.2

-V

C82C84A, I82C84

M82C84A, Notes 1, 2

VIL

Logical Zero Input Voltage

0.8

Notes 1, 2, 3

VIHR

Reset Input High Voltage

VCC -0.8

VILR

Reset Input Low Voltage

0.5

VT+ - VT-

Reset Input Hysteresis

0.2 VCC

VOH

Logical One Output Current

VCC -0.4

IOH = -4.0mA for CLK Output

IOH = -2.5mA for All Others

VOL

Logical Zero Output Voltage

0.4

IOL = +4.0mA for CLK Output

IOL = +2.5mA for All Others

Input Leakage Current

-1.0

1.0

µAVIN = VCC or GND except ASYNC,

X1: (Note 4)

ICCOP

Operating Power Supply Current

Crystal Frequency = 25MHz

Outputs Open, Note 5

NOTES:

1. F/C is a strap option and should be held either

≤ 0.8V or ≥ 2.2V. Does not apply to X1 or X2 pins.

2. Due to test equipment limitations related to noise, the actual tested value may differ from that specified, but the specified limit is

guaranteed.

3. CSYNC pin is tested with VIL ≤ 0.8V.

4. ASYNC pin includes an internal 17.5k

Ω nominal pull-up resistor. For ASYNC input at GND, ASYNC input leakage current = 300µA

nominal, X1 - crystal feedback input.

5. f = 25MHz may be tested using the extrapolated value based on measurements taken at f = 2MHz and f = 10MHz.

Capacitance TA = +25oC

SYMBOL

PARAMETER

TYPICAL

UNITS

TEST CONDITIONS

CIN

Input Capacitance

FREQ = 1MHz, all measurements are

referenced to device GND

COUT

Output Capacitance

82C84A

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