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R5F101PLDFB 数据表(PDF) 48 Page - Renesas Technology Corp |
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R5F101PLDFB 数据表(HTML) 48 Page - Renesas Technology Corp |
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48 / 200 page  RL78/G13 1. OUTLINE Page 48 of 194 R01DS0131EJ0310 Rev.3.10 Nov 15, 2013 1.6 Outline of Functions [20-pin, 24-pin, 25-pin, 30-pin, 32-pin, 36-pin products] Caution This outline describes the functions at the time when Peripheral I/O redirection register (PIOR) is set to 00H. (1/2) Item 20-pin 24-pin 25-pin 30-pin 32-pin 36-pin Code flash memory (KB) 16 to 64 16 to 64 16 to 64 16 to 128 16 to 128 16 to 128 Data flash memory (KB) 4 − 4 − 4 − 4 to 8 − 4 to 8 − 4 to 8 − RAM (KB) 2 to 4 Note1 2 to 4 Note1 2 to 4 Note1 2 to 12 Note1 2 to 12 Note1 2 to 12 Note1 Address space 1 MB Main system clock High-speed system clock X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK) 1 to 20 MHz: VDD = 2.7 to 5.5 V, 1 to 8 MHz: VDD = 1.8 to 2.7 V, 1 to 4 MHz: VDD = 1.6 to 1.8 V High-speed on-chip oscillator HS (High-speed main) mode: 1 to 32 MHz (VDD = 2.7 to 5.5 V), HS (High-speed main) mode: 1 to 16 MHz (VDD = 2.4 to 5.5 V), LS (Low-speed main) mode: 1 to 8 MHz (VDD = 1.8 to 5.5 V), LV (Low-voltage main) mode: 1 to 4 MHz (VDD = 1.6 to 5.5 V) Subsystem clock − Low-speed on-chip oscillator 15 kHz (TYP.) General-purpose registers (8-bit register × 8) × 4 banks Minimum instruction execution time 0.03125 μs (High-speed on-chip oscillator: fIH = 32 MHz operation) 0.05 μs (High-speed system clock: fMX = 20 MHz operation) Instruction set • Data transfer (8/16 bits) • Adder and subtractor/logical operation (8/16 bits) • Multiplication (8 bits × 8 bits) • Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc. I/O port Total 16 20 21 26 28 32 CMOS I/O 13 (N-ch O.D. I/O [VDD withstand voltage]: 5) 15 (N-ch O.D. I/O [VDD withstand voltage]: 6) 15 (N-ch O.D. I/O [VDD withstand voltage]: 6) 21 (N-ch O.D. I/O [VDD withstand voltage]: 9) 22 (N-ch O.D. I/O [VDD withstand voltage]: 9) 26 (N-ch O.D. I/O [VDD withstand voltage]: 10) CMOS input 3 3 3 3 3 3 CMOS output − − 1 − − − N-ch O.D. I/O (withstand voltage: 6 V) − 2 2 2 3 3 Timer 16-bit timer 8 channels Watchdog timer 1 channel Real-time clock (RTC) 1 channel Note 2 12-bit interval timer (IT) 1 channel Timer output 3 channels (PWM outputs: 2 Note 3) 4 channels (PWM outputs: 3 Note 3) 4 channels (PWM outputs: 3 Note 3), 8 channels (PWM outputs: 7 Note 3) Note 4 RTC output − Notes 1. In the case of the 4 KB, this is about 3 KB when the self-programming function and data flash function are used. (For details, see CHAPTER 3 in the RL78/G13 User’s Manual Hardware) 2. Only the constant-period interrupt function when the low-speed on-chip oscillator clock (fIL) is selected 3. The number of PWM outputs varies depending on the setting of channels in use (the number of masters and slaves). (6.9.3 Operation as multiple PWM output function in the RL78/G13 User’s Manual Hardware) 4. When setting to PIOR = 1 |
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