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R5F101PLDFB 数据表(PDF) 49 Page - Renesas Technology Corp

部件名 R5F101PLDFB
功能描述  RENESAS MCU
PDF  200 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R5F101PLDFB 数据表(HTML) 49 Page - Renesas Technology Corp

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RL78/G13
1. OUTLINE
Page 49 of 194
R01DS0131EJ0310 Rev.3.10
Nov 15, 2013
(2/2)
Item
20-pin
24-pin
25-pin
30-pin
32-pin
36-pin
Clock output/buzzer output
−
1
1
2
2
2
• 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz
(Main system clock: fMAIN = 20 MHz operation)
8/10-bit resolution A/D converter
6 channels
6 channels
6 channels
8 channels
8 channels
8 channels
Serial interface
[20-pin, 24-pin, 25-pin products]
• CSI: 1 channel/simplified I2C: 1 channel/UART: 1 channel
• CSI: 1 channel/simplified I2C: 1 channel/UART: 1 channel
[30-pin, 32-pin products]
• CSI: 1 channel/simplified I2C: 1 channel/UART: 1 channel
• CSI: 1 channel/simplified I2C: 1 channel/UART: 1 channel
• CSI: 1 channel/simplified I2C: 1 channel/UART (UART supporting LIN-bus): 1 channel
[36-pin products]
• CSI: 1 channel/simplified I2C: 1 channel/UART: 1 channel
• CSI: 1 channel/simplified I2C: 1 channel/UART: 1 channel
• CSI: 2 channels/simplified I2C: 2 channels/UART (UART supporting LIN-bus): 1 channel
I
2C bus
−
1 channel
1 channel
1 channel
1 channel
1 channel
Multiplier and divider/multiply-
accumulator
• 16 bits × 16 bits = 32 bits (Unsigned or signed)
• 32 bits ÷ 32 bits = 32 bits (Unsigned)
• 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed)
DMA controller
2 channels
Vectored interrupt
sources
Internal
23
24
24
27
27
27
External
3
5
5
6
6
6
Key interrupt
−
Reset
• Reset by RESET pin
• Internal reset by watchdog timer
• Internal reset by power-on-reset
• Internal reset by voltage detector
• Internal reset by illegal instruction execution Note
• Internal reset by RAM parity error
• Internal reset by illegal-memory access
Power-on-reset circuit
• Power-on-reset:
1.51 V (TYP.)
• Power-down-reset: 1.50 V (TYP.)
Voltage detector
• Rising edge :
1.67 V to 4.06 V (14 stages)
• Falling edge :
1.63 V to 3.98 V (14 stages)
On-chip debug function
Provided
Power supply voltage
VDD = 1.6 to 5.5 V
Operating ambient temperature
TA = 40 to +85°C (A: Consumer applications, D: Industrial applications )
TA = 40 to +105°C (G: Industrial applications)
Note
The illegal instruction is generated when instruction code FFH is executed.
Reset by the illegal instruction execution not issued by emulation with the in-circuit emulator or on-chip
debug emulator.



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