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R5F364AMDFB 数据表(PDF) 79 Page - Renesas Technology Corp |
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R5F364AMDFB 数据表(HTML) 79 Page - Renesas Technology Corp |
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79 / 92 page ![]() R01DS0032EJ0200 Rev.2.00 Page 79 of 88 Feb 07, 2011 M16C/64A Group 5. Electrical Characteristics VCC1 = VCC2 = 3 V Timing Requirements (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.3.3 Timing Requirements (Memory Expansion Mode and Microprocessor Mode) Notes: 1. Calculated according to the BCLK frequency as follows: 2. Calculated according to the BCLK frequency as follows: n is 1 for 1 wait setting, 2 for 2 waits setting and 3 for 3 waits setting. 3. Calculated according to the BCLK frequency as follows: n is 2 for 2 waits setting, 3 for 3 waits setting. Table 5.54 Memory Expansion Mode and Microprocessor Mode Symbol Parameter Standard Unit Min. Max. tac1(RD-DB) Data input access time (for setting with no wait) (Note 1) ns tac2(RD-DB) Data input access time (for setting with wait) (Note 2) ns tac3(RD-DB) Data input access time (when accessing multiplex bus area) (Note 3) ns tsu(DB-RD) Data input setup time 50 ns tsu(RDY-BCLK) RDY input setup time 85 ns th(RD-DB) Data input hold time 0ns th(BCLK-RDY) RDY input hold time 0ns 0.5 10 9 × f BCLK () ----------------------60 ns [] – n 0.5 + () 10 9 × f BCLK () ------------------------------------ 60 ns [] – n 0.5 – () 10 9 × f BCLK () ------------------------------------60 ns [] – |
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