| 数据搜索系统,热门电子元器件搜索 |
|
THCS133 数据表(PDF) 6 Page - THine Electronics, Inc. |
|
|
|||||||||||||||||||||||||||||
THCS133 数据表(HTML) 6 Page - THine Electronics, Inc. |
|
6 / 10 page ![]() THCS133_Rev.1.00_E Copyright©2014 THine Electronics, Inc. THine Electronics, Inc. Security E 6/10 Transmitter Mode Internal Register Input (DATA[15:0]) Parallel Input[15:0] Internal Sampling Clock Serial Data Output Serial Output Serial Output Receiver Mode Serial Data Input Serial Input Serial Input Internal Register Output (DATA[15:0]) Parallel Output[15:0] tPS tSP 1/fPSPL Internal sampling clock and CTL signals are asynchronous. Electrical Characteristics AC Characteristics (Latch Enable, Output Enable) Symbol Parameter Condition Min Typ Max Unit tWLE Latch Enable Pulse Width - 130 - - ns tSULE Latch Enable Rise Edge Setup Time - 133 - - ns tHLE Latch Enable Rise Edge Hold Time - 20 - - ns tCLLE1 Latch Enable Clearance1 - 100 - - ns tCLLE2 Latch Enable Clearance2 - 20 - - us tWOE Output Enable Pulse Width - 50 - - ns tCLOE Output Enable Clearance - 50 - - ns tPZO Output Enable Delay Time CL=25pF - - 50 ns tPOZ Output Disable Delay Time CL=25pF - - 38 ns Timing Chart (Latch Enable, Output Enable) 8bit Input + Latch Enable Upper Latch Enable (CTL1) Lower Latch Enable (CTL0) Data Input Upper 8bit data Lower 8bit data Upper 8bit data (DATA[7:0]) tWLE tSULE tHLE tCLLE2 tCLLE1 |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |