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HD74LS74AFPEL 数据表(PDF) 1 Page - Renesas Technology Corp

部件名 HD74LS74AFPEL
功能描述  Dual D-type Positive Edge-triggered Flip-Flops (with Preset and Clear)
PDF  8 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

HD74LS74AFPEL 数据表(HTML) 1 Page - Renesas Technology Corp

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R04DS0012EJ0400 Rev.4.00
Page 1 of 7
Dec 21, 2011
Preliminary Datasheet
HD74LS74A
Dual D-type Positive Edge-triggered Flip-Flops
(with Preset and Clear)
Features
 Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LS74AP
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
HD74LS74AFPEL
SOP-14 pin (JEITA)
PRSP0014DF-B
(FP-14DAV)
FP
EL (2,000 pcs/reel)
HD74LS74ARPEL
SOP-14 pin (JEDEC)
PRSP0014DE-A
(FP-14DNV)
RP
EL (2,500 pcs/reel)
Note:
Please consult the sales office for the above package availability.
Pin Arrangement
(Top view)
VCC
2CLR
2D
2CK
2Q
2PR
1CLR
GND
1D
1CK
1PR
1Q
1
Q
2
Q
1
2
3
4
5
6
7
14
8
9
10
11
12
13
PR
CK
D
CLR
Q
Q
D
CK
PR
Q
Q
CLR
Function Table
Input
Output
Preset
Clear
Clock
D
Q
Q
L
H
X
X
H
L
H
L
X
X
L
H
L
L
X
X
H*
H*
H
H
H
H
L
H
H
L
L
H
H
H
L
X
Q0
Q
0
H; high level, L; low level, X; irrelevant,
; transition from low to high level,
Q0; level of Q before the indicated steady-state input conditions were established.
Q
0; complement of Q0 or level of Q before the indicated steady-state input conditions were established.
*;This configuration is nonstable, that is, it will not persist when preset and clear inputs return to their inactive (high) level.
R04DS0012EJ0400
(Previous: REJ03D0415-0300)
Rev.4.00
Dec 21, 2011


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