AN4124 datasheet(23/32 Pages) STMICROELECTRONICS

23 / 32 page

AN4124

Redundancy and functions

Doc ID 023294 Rev 2

23/32

break;

}

while(FCCU.CTRL.B.OPS != CTRL_OPS3); /* wait for the completion of

the operation */

if ( FCCU_CFS_Read(CFS_number, &CFS_Value)){

if (CFS_Value == 0){

exit_value = 1;

/* Returned value = SUCCESS */

}

}while(CFS_Value==1);

}

else {

/* HW recoverable fault*/

}

};

return(exit_value);

}

A.2.6

Clear all critical faults

uint16_t FCCU_Clear_CRITICAL_Fault(void){

tU32 CFS_Value;

uint8_t tc0_error = 0;/* Error counter */

for(Num_Fault = 0;Num_Fault <= 24; Num_Fault++){

/* Num_Fault <= 24 */

/* ----------------- Read State --------------------- */

if(FCCU_CFS_Read(Num_Fault, &CFS_Value)){

if (CFS_Value == 1){/* The fault was latched correctly */

if((RGM.FES.R & 0x0080) == 0x0080){

/* Retun from FCCU SAFE mode reset */

FCCU_CFS_Clear(Num_Fault);

/* Clear the fault by procedure */

RGM.FES.R = 0xFFFF; /* Clear FER register */

ME.MCTL.R = (DRUN_MODE << 28 | 0x00005AF0); /* Mode & Key */

ME.MCTL.R = (DRUN_MODE << 28 | 0x0000A50F); /* Mode & Key *

/* Wait for mode entry to complete */

while(ME.GS.B.S_MTRANS==1);

/* Check DRUN mode has been entered */

while(ME.GS.B.S_CURRENT_MODE!=DRUN_MODE);

tc0_error = 0;

/* Error counter */

}

}else{

/* No fault was latched */

}

}else{

/* Read State ERROR */

}

if(tc0_error == 0)

return(PASS);

return(FAIL);

}

A.2.7

Clear all Non-critical faults

uint16_t FCCU_Clear_NON_CRITICAL_Fault(void){

tU32 NCFS_Value;

uint8_t tc1_error = 0;/* Error counter */

for(Num_Fault = 0; Num_Fault <= 24; Num_Fault++){

/* ----------------- Read State --------------------- */

if(FCCU_NCFS_Read(Num_Fault, &NCFS_Value)){

if (NCFS_Value == 1){/* The fault was latched correctly */

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