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AN4367 数据表(PDF) 8 Page - STMicroelectronics |
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AN4367 数据表(HTML) 8 Page - STMicroelectronics |
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8 / 13 page ![]() Machine check handler AN4367 8/13 DocID025333 Rev 1 Low level driver immediately starts processing after. It executes several steps like machine check status register saving, context of the interrupted process saving and other. This part should store some additional information too as they will be used by higher layer user handler to analyze the root cause of the exception later. Detailed description of the machine check resources, their meaning and proper handling in case of interrupt is described in the Z4 Core User Manual documentation. Low level handler shall follow rules and recommendation described there. 2.1.2 Final phase Here the handler should restore the saved context of the interrupted process and return with the mcrfi instruction. Before rfmci instruction is executed, which fills instruction pointer with MCSRR0 content and MSR register with MCSRR1 content, MCSRR0 modification might be needed. There are two cases which determine if the manipulation is needed or not, such information should be decided in the user handler and passed down to the low level driver 1. User handler was able to find the cause of the machine check exception and to fix it in a way, that program can re-execute the same instruction that caused the machine check exception 2. User was able to find the cause of the exception, but the problem remains and re- executing the same instruction would lead again the machine check exception => Modification of the MCSRR0 is needed. 2.1.3 Modification of the MCSRR0 register In case that the cause of the exception cannot be removed, MCSRR0 register value has to be modified in a way that it takes the address of the following instruction. This prevents re- execution of the faulty instruction and retriggering the machine check exception. Modification has to consider VLE instruction coding in case the interrupted process is implemented in VLE coding and increment the value accordingly of the length of the faulty instruction pointed by the current MCSRR0 register content, see Figure 2. Figure 2. Modification of MCSRR0 register content |
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