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AN1313 数据表(PDF) 4 Page - STMicroelectronics |
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AN1313 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 16 page ![]() AN1313 - APPLICATION NOTE 4/16 2 - MODIFIED FUNCTIONALITIES 2.1 - Pin Out 2.1.1 - Pin 84 This pin was named Vpp/RPD on the ST10F168 and was the 12V input pin for Flash programming. In the ST10F269, it is now only used as RPD as the Flash is a single voltage one. 2.1.1.1 - Hardware Impact This pin is no longer designed to accept 12V inputs. Its ratings are the same as any other pin: -0.5V to VDD +0.5V. 2.1.1.2 - Software Impact None. Note: Some applications migth be using the Vpp pin as a protection for Flash programming by software controlling the 12V charge pump. The ST10F269 being now a single voltage Flash, Vpp will appear as permanently “ON” and thus such a protection can not be reproduced with the ST10F269. 2.1.2 - Pins 17 and 56 For the ST10F168, these are VDD pins connected to 5Volts. For the ST10F269, these pins 17 and 56 are de-coupling pins for the 3,3V and respectively named DC2 and DC1. A de-coupling capacitor must be connected to these pins and the nearest VSS. 2.1.2.1 - Hardware Impact The application board should be re-designed in order to introduce the decoupling capacitors. 2.1.2.2 - Software Impact None. 2.2 - XRAM The ST10F168 has only 6KBytes of extension RAM while the ST10F269 has 10KBytes. The XRAM address range in the ST10F168 is 00’D000h - 00’E7FFh and is enabled if XPEN (bit 2 of SYSCON register) is set. The XRAM of the ST10F269 is divided into 2 ranges named XRAM1 of 2KBytes and XRAM2 of 8KBytes: – The XRAM1 address range is 00’E000h - 00’E7FFh if enabled (XPEN set -bit 2 of SYSCON register- AND XRAM1EN set - bit 2 of XPERCON register-). – The XRAM2 address range is 00’C000h - 00’DFFFh if enabled (XPEN set -bit 2 of SYSCON register- AND XRAM2EN set - bit 3 of XPERCON register-). 2.2.1 - Hardware Impact None. 2.2.2 - Software Impacts The memory mapping of the application may be impacted by the difference in XRAM size or by the separation in 2 ranges independently selectable. In the ST10F168, setting XPEN bit in SYSCON register enables the XRAM. In the ST10F269, setting XPEN bit in SYSCON register enables the XRAM1 only (default reset configuration of the new XPERCON register). Thus accesses to the range 00’D000h - 00’DFFFh that was part of the ST10F168 XRAM will be redirected to external memory. Three configurations may be seen: 1. Configuration 1: no external memory in address range 00’C000h - 00’CFFFh. Impact: one register to configure. Work-around: Set the bit XRAM2EN of XPERCON new register. It enables the second XRAM range. The total XRAM range is then 00’C000h - 00’E7FFh which includes the ST10F168 range. |
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