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AN3213 数据表(PDF) 46 Page - STMicroelectronics |
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AN3213 数据表(HTML) 46 Page - STMicroelectronics |
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46 / 64 page  ST7570 demonstration board description AN3213 46/64 Doc ID 17429 Rev 1 Figure 41. Carrier frequency deviation vs. crystal tolerance In order to evaluate the compliance, with the requirement of the delay between mains zero crossing and the beginning of the communication window, the zero crossing coupling circuit response needs to be considered, introducing a delay of 30 µs (typical) between mains zero crossing and ZC_IN_A signal (see Section 7.1.4). The target delay equal to 120 µs can be achieved by adding an integer number of 13 µs steps to the circuit delay (References 2). In particular, with 7 steps the total delay is 7×13 µs + 30 µs ≈ 120 µs. The jitter around the expected value changes in accordance with the crystal tolerance, as shown in Figure 42. Figure 42. Delay between mains zero crossing and transmission start: jitter vs. crystal tolerance The maximum tolerance for the HC49U crystal adopted for the ST7570 demonstration board, that is 150 ppm, allows the above requirements to be met. |
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