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AN4541 数据表(PDF) 9 Page - STMicroelectronics |
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AN4541 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 21 page ![]() DocID026513 Rev 1 9/21 AN4541 SD3.0 constrains 21 4 SD3.0 constrains As the SD standard requires that data lines are pulled-up to VDD, the STMicroelectronics EMIF devices include pull-up resistors on each line (Figure 1). The standard specifies 10 kΩ≤ RPULL-UP ≤ 100 kΩ (90 kΩ for RDAT3). One of the main issues for UHS-I compliance is to manage the capacitance budget of the link host-card. The recommended approximate value is 21 pF (Physical Layer specification, table 6-12, page 159), including the SD card capacitance that is assumed to be equal to 10 pF maximum. Therefore, only 11 pF remain for the printed circuit board, the SD card connector and the protection. The typical capacitance of a µSD card connector is measured at 0.5 pF (Figure 10). Figure 10. Connector parasitic capacitance The line capacitance of the EMIF devices is 7.5 pF for 1.8 V signaling (Figure 11). Figure 11. Connector parasitic capacitance The CBUS capacitance must therefore be around 3 pF. These values are critical for obtaining the highest SD card bit rate specifications, currently around 95 MB/s in read mode and 90 MB/s in write mode for SDXC card types. The rise and fall times specified by the standard are less than 0.96 ns and the maximum clock frequency is 208 MHz. Figure 12 shows the test setup used to perform the different time measurements on the SD link. A High-speed card reader working on USB3.0 is connected to a PC. |
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