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AN557 APPLICATION NOTE

Which therefore gives:

Fig. 4h shows the voltage ripple VESR due to the resistive component of the capacitor. This component is

VESR (t) = iC (t) × ESR. Fig. 4i shows the overall ripple Vo, which is the sum of the two previous compo-

nents. As the frequency increases (> 20kHz), which is required to reduce both the cost and the sizes of L

and C, the VESR component becomes dominant. Often it is necessary to use capacitors with greater ca-

pacitance (or more capacitors connected in parallel to limit the value of ESR within the required level.

We will now examine the stepdown configuration in more detail, referring to fig. 1 and taking the be-haviour

shown in Fig. 4 into account.

Starting from the initial conditions, where Q = ON, vC = Vo and iL = iD = 0, using Kirckoff second principle

we may write the following expression:

Vi = vL + vC (Vsat is neglected against Vi).

(1)

which gives :

(2)

The current through the inductance is given by :

(3)

When Vi, Vo, and L are constant, IL varies linearly with t. Therefore, it follows that :

(4)

When Q is OFF the current through the coil has reached its maximum value, Ipeak and because it cannot

very instantaneously, the voltage across the ased to allow the recirculation of the current through the load.

When Q switches OFF, the following situation is present:

vC(t) = Vo, iL (t) = iD (t) = Ipeak

And the equation associated to the following loop may be written :

(5)

where : vC = Vo

(6)

It follows therefore that :

(7)

∆

---

∆

--------

⋅⋅

∆

----

∆

8fc

--------

⋅

--------

–

()

-----------------------

–

()

-----------------------

∆

–

()T

-----------------------------------

--------

()

-------------------------

–

L t

()

-------------------- t

–

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