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AN1330 数据表(PDF) 9 Page - STMicroelectronics |
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AN1330 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 31 page ![]() AN1330 Functional description 9/31 reference (1.235 V), while the inverting input (FB) is connected to the external divider or directly to the output voltage. The output (COMP) is connected to the external compensation network. The uncompensated error amplifier has the following characteristics: The error amplifier output is compared with the oscillator sawtooth to perform PWM control. 2.6 PWM comparator and power stage This block compares the oscillator sawtooth and the error amplifier output signals generating the PWM signal for the driving stage. The power stage is a highly critical block, as it functions to guarantee a correct turn ON and turn OFF of the PDMOS. The turn ON of the power element, or more accurately, the rise time of the current at turn ON, is a very critical parameter. At a first approach, it appears that the faster the rise time, the lower the turn ON losses. However, there is a limit introduced by the recovery time of the recirculation diode. In fact, when the current of the power element is equal to the inductor current, the diode turns OFF and the drain of the power is able to go high. But during its recovery time, the diode can be considered a high value capacitor and this produces a very high peak current, responsible of many problems: ● Spikes on the device supply voltage that cause oscillations (and thus noise) due to the board parasitics ● Turn ON overcurrent leads to a decrease in the efficiency and system reliability ● Major EMI problems ● Shorter freewheeling diode life The fall time of the current during the turn OFF is also critical, as it produces voltage spikes (due to the parasitic elements of the board) that increase the voltage drop across the PDMOS. In order to minimize these problems, a new driving circuit topology has been used and the block diagram is shown in Figure 8. The basic idea is to change the current levels used to turn the power switch ON and OFF, based on the PDMOS and the gate clamp status. This circuitry allows the power switch to be turned OFF and ON quickly and addresses the freewheeling diode recovery time problem. The gate clamp is necessary to avoid that VGS of the internal switch goes higher than VGSmax. The ON/OFF Control block protects against any cross conduction between the supply line and ground. Table 2. Uncompensated error amplifier characteristics Description Values Transconductance 2300 µS Low frequency gain 65 dB Minimum sink/source voltage 1500 µA/300 µA Output voltage swing 0.4 V/3.65 V Input bias current 2.5 µA |
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