AN2684

IFP006V1 demonstration board description

Doc ID 14266 Rev 1

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4.5.3

Burst immunity test

Table 3 gives the burst setup configuration adopted to perform this test.

Figure 13 below shows the standard timing waveform applied during the burst test.

Figure 13.

Burst timing waveform

Table 4 shows the results of an inherent burst test. Normal performance has been observed

when applying four different disturbance levels on the output ports and Vcc main voltage

power supply.

Table 3.

Burst setup configuration

Test level

Condition

Pulse time rt

5 ns ± 30%

Pulse duration td

50 ns ± 30%

Source impedance

Zq = 50

Ω ± 20%

Polarity

Positive / negative

Burst duration (td)

15 ms ± 20%

Burst frequency (f)

5 kHz

Burst period (tr)

300 ms ± 20%

Duration time (T)

5 min