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AN3115 数据表(PDF) 10 Page - STMicroelectronics

部件名 AN3115
功能描述  LNB power supply based on the LNBH23L supply and control IC with step-up and I²C interface
PDF  28 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

AN3115 数据表(HTML) 10 Page - STMicroelectronics

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Block diagram and pin function description
AN3115
10/28
Doc ID 16830 Rev 3
Table 4.
LNBH23L pin description
QFN 5x5
pin n°
Symbol
Name
Pin function
19
VCC
Supply input
8 to 15 V IC DC-DC power supply
18
VCC–L
Supply input
8 to 15 V analog power supply
4
LX
NMos drain
Integrated N-channel Power MOSFET Drain
27
VUP
Step-up voltage
Input of the linear post-regulator. The voltage on this pin is monitored
by the internal step-up controller to keep a minimum dropout across
the linear pass transistor.
21
VoRX
LDO output port
Output of the linear post-regulator
22
VoTX
Output port during
22 kHz tone TX
TX Output to the LNB
6
SDA
Serial data
Bi-directional data from/to the I²C bus
9
SCL
Serial clock
Clock from the I²C bus
12
DSQIN
DiSEqC input
This pin accepts the DiSEqC code from the main microcontroller. The
LNBH23L uses this code to modulate the internally-generated 22 kHz
carrier. Set this pin to ground if not used.
14
TTX
TTX enable
This pin, as well as the TTX I²C bit of the system register, is used to
control the TTX function enable before starting the 22 kHz tone
transmission. Set this pin floating or to GND if not used.
29
Reserved
Reserved
To be connected to GND
11
PDC
Pull-down control
To be connected to the external NPN transistor base to reduce the 22
kHz tone distortion in case of heavy capacitive load at light output
current. If not used it can be left floating.
13
EXTM
External
modulation
External Modulation Input acts on VoRX linear regulator output to
superimpose an external 22 kHz signal. Needs DC decoupling to the
AC source. If not used it can be left floating.
5
P-GND
Power ground
DC-DC converter power ground to be connected directly below the
ePad of the PCB top GND layer.
ePad
ePad
ePad
On the bottom side of the QFN-32 package. It must be connected with
power ground and to the ground layer through vias to dissipate heat.
20
A-GND
Analog ground
Analog circuits ground
15
BYP
Bypass capacitor
Needed for internal preregulator filtering. The BYP pin is intended
only to connect an external ceramic capacitor. Any connection of this
pin to an external current or voltage sources may cause permanent
damage to the device.
10
ADDR
Address setting
Two I²C bus addresses available by setting the ADDR pin voltage
level.
28
ISEL
Current selection
The resistor RSEL connected between ISEL and GND defines the
linear regulator current limit threshold by the equation: IMAX
(typ.)=10000/ RSEL.
30
Reserved
Reserved
To be left floating. Do not connect to GND
1, 2, 3, 7,
8, 16, 17,
23, 24, 25,
26, 31, 32
N.C.
Not connected
Not internally connected pins



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