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UPD30121 数据表(PDF) 1 Page - NEC

部件名 UPD30121
功能描述  VR4121TM 64-/32-BIT MICROPROCESSOR
PDF  76 Pages
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制造商  NEC [NEC]
网页  http://www.nec.com/
标志 NEC - NEC

UPD30121 数据表(HTML) 1 Page - NEC

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MOS INTEGRATED CIRCUIT
µµµµPD30121
VR4121
TM
64-/32-BIT MICROPROCESSOR
Document No. U14691EJ1V0DS00 (1st edition)
Date Published June 2000 N CP(K)
Printed in Japan
DATA SHEET
2000
©
DESCRIPTION
The
µPD30121 (VR4121) is one of NEC’s VR SeriesTM RISC (Reduced Instruction Set Computer) microprocessors
and is a high-performance 64-/32-bit microprocessor employing the MIPS
TM RISC architecture.
The VR4121 uses the high-performance, super power-saving VR4120
TM as the CPU core, and has many peripheral
functions such as a DMA controller, software modem interface, serial interface, keyboard interface, IrDA interface,
touch panel interface, real-time clock, A/D converter, and D/A converter.
Configured with these functions, the
VR4121 is suitable for high-speed battery-driven portable information systems. The external memory bus width can
be selected from 32 bits and 16 bits, realizing high-speed data transfer.
Detailed function descriptions are provided in the following user’s manual.
Be sure to read it before
designing.
• VR4121 User’s Manual (U13569E)
FEATURES
• Employs 64-bit MIPS architecture
• Conforms to MIPS III instruction set (deleting FPU,
LL, LLD, SC, and SCD instructions)
• Memory controller (ROM, EDO-type DRAM,
synchronous DRAM (SDRAM), synchronous ROM
(SROM), and flash memory supported)
• Optimized 6-stage pipeline
• Keyboard interface and touch panel interface
• Supports MIPS16 instruction set
• 4-channel DMA controller
• Supports high-speed product-sum operation
instructions
• Serial interface (NS16550 compatible)
• IrDA interface for infrared communication
• Supports four types of operating modes, enabling
more effective power-consumption management
• Software modem interface
• A/D and D/A converters to support digital voice I/O
• Supports ISA bus subset
• Internal maximum operating frequency: 131/168 MHz
• On-chip clock generator
• Address space physical: 32 bits
virtual:
40 bits
Integrates 32 double entry TLBs
• Power supply voltage: VDD2 = 2.5 V (internal), VDD3 =
3.3 V (external) (131 MHz model)
• Package: 224-pin fine-pitch FBGA
• High-capacity instruction/data separated cache
memories
Instruction:
16 Kbytes
Data:
8 Kbytes
APPLICATIONS
• Battery-driven portable information systems
• Embedded controllers, etc.
ORDERING INFORMATION
Part Number
Package
Internal Maximum Operating Frequency
µPD30121F1-131-GA1
224-pin plastic FBGA (16
× 16)
131 MHz
µPD30121F1-168-GA1
224-pin plastic FBGA (16
× 16)
168 MHz


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