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AN4077 数据表(PDF) 22 Page - STMicroelectronics |
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AN4077 数据表(HTML) 22 Page - STMicroelectronics |
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22 / 33 page ![]() Test results and significant waveforms AN4077 22/33 Doc ID 022997 Rev 1 established between the cascade converter and the PFC via the disable function included in the PFC_OK pin (pin #6). Needless to say, this operation assumes that the cascaded PFC converter stage works as the master (thanks also to the integrated brownout function) and the DC-DC stage as the slave or, in other words, that the PFC stage starts first, it powers both controllers and enables/disables the operation of the downstream converter stage. Several PWM controllers by STMicroelectronics have integrated some housekeeping functions for the D2D and offer the possibility to interface directly the L6564H with the downstream PWM controller via dedicated pins. Should the residual consumption of the chip be an issue, it is also possible to cut down the supply voltage. In this case, such operation assumes that the cascaded DC-DC converter stage works as the master and the PFC stage as the slave or, in other words, that the DC- DC stage starts first, it powers both controllers and enables/disables the operation of the PFC stage. The EVL6564H-100W offers the possibility to test the disable function by connecting it to the cascaded converter of the DC-DC converter. The PFC_OK pin, VCC and ground are available via the series resistors R30 and R31 ( Figure 2). Figure 31. Interface circuits that let DC-DC converter controller IC disable the L6564H |
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