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AN4355 数据表(PDF) 13 Page - STMicroelectronics |
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AN4355 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 25 page ![]() DocID025240 Rev 2 13/25 AN4355 Supply management 25 Figure 8. Gate drivers supply circuit The supply circuit for the device logic is shown in Figure 9. When the VREG voltage is generated through the integrated linear regulator the VCCREG pin must be connected to a supply voltage ranging from VREG + 3 V = 6.3 V (3 V is the dropout voltage of the linear regulator) and VCC. VCCREG must be always lower than VCC otherwise the ESD protection diode is turned on and the device can be damaged. The device can be protected from this event adding an external low drop diode between the VCCREG and VCC pins. In order to supply directly the logic the external supply voltage must be connected to both the VREG and VCCREG pins; this way the internal linear regulator is disabled. Figure 9. Logic supply circuit |
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