Electromagnetic compatibility (EMC) requirements

AN2846

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Doc ID 15130 Rev 1

6.3

IEC 61000 4-5

This standard specifies the behavior of the device when subjected to voltage surges applied

on all input pins of the system. For all analog inputs, the coupling method is a 42

Ω serial

resistance and a 0.5 µF capacitor. For the DC power line, the coupling is 2

Ω resistor, and

18 µF capacitor. The required voltage surge levels are:

●

●

The system must continue to operate as intended. Temporary degradation of the

performance is acceptable during the test, but the system must recover by itself after the

test (B criterion).

6.3.1

Results on input pins

clamp protects the SCLT3-8 input and limits the input voltage at 40 V. The input current

reaches 0.45 A.

When a negative voltage surge is applied the input diode is biased in forward mode and the

current is 0.45 mA (see Figure 42)

Figure 42.

Vsurge

0.2kV/div

+ 1.0 kV

0.45A

0.2A/div

20V/div

40V

0.45A

0.5kV/div

0.2A/div

1V/div

1V

-1.0 kV

Positive voltage surge

Negative voltage surge