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INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY

Photomasking, ionic implantation, diffusion, metal deposition, and etching processes

are repeated many times, using different materials and dopants at different temperatures in

order to achieve all the operations needed to produce the requested characteristics of the sil-

icon chip. The resolution limit (minimal line size inside the circuit) of current technology is 0.35

microns. Achieving such results requires very sophisticated processes as well as superior

quality levels.

Backlap is the final step of wafer fabrication. The wafer thickness is reduced from 650 mi-

crons to a minimum of 180 microns (for smartcard products).

Wafer fabrication takes place in an extremely clean environment, where air cleanliness is one

million times better than the air we normally breathe in a city, or some orders of magnitude

better than the air in a heart transplant operating theatre. Photomasking, for example, takes

place in rooms where there’s maximum one particle whose diameter is superior to 0.5 micron

(and doesn’t exceed 1 micron) inside one cubic foot of air.

All these processes are part of the manufacturing phase of the chip itself. Silicon chips are

grouped on a silicon wafer (in the same way postage stamps are printed on a single sheet of

paper) before being separated from each other at the beginning of the assembly phase.

Wafer Probing. This step takes place between wafer fabrication and assembly. It verifies the

functionality of the device performing thousands of electrical tests, by means of special micro-

probes (see graph on next page). Wafer probing is composed of two different tests:

1. Process parametric test: this test is performed on some test samples and checks the

wafer fabrication process itself.

2. Full wafer probing test: this test verifies the functionality of the finished product and is per-

formed on all the dies.

Figure 6. Description of the Wafer Probing Operation

The bad die are automatically marked with a black dot so they can be separated from the

good die after the wafer is cut. A record of what went wrong with the non-working die is closely

examined by failure analysis engineers to determine where the problem occurred so that it

may be corrected. The percentage of good die on an individual wafer is called its yield.