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AN970 数据表(PDF) 2 Page - STMicroelectronics |
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AN970 数据表(HTML) 2 Page - STMicroelectronics |
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2 / 10 page ![]() 2/10 SPI COMMUNICATION BETWEEN ST7 AND EEPROM 1 ST7 / EEPROM SPI INTERFACE This section summarizes the main features of the ST7/EEPROM SPI interface. Please refer to the ST7 datasheet for more details. The Serial Peripheral Interface (SPI) allows full-duplex, synchronous, serial communication between devices. A SPI system may consist of a master and several slaves, or of a system in which devices may be either master or slave. There is only one master at any one time. The Bus signals are: - The serial clock (SCK). - The MOSI (Master Out Slave In). - The MISO (Master In Slave Out). One more pin, the SS pin (slave select), is needed to select the slave or the master mode for each device. this can be done in hardware or software mode. In this application the ST7 is always used as master (SS pin = high level) and configures the EEPROM mode through an output. The ST7 and SPI interface set-up is shown Figure 1. During SPI transfer, data is simultaneously transmitted (shifted out serially) and received (shifted in serially). Data are transmitted MSB first. The serial clock is used to synchronize the data transfer during a sequence of eight clock pulses. Figure 1. ST7 and SPI Interface Set-Up ST7 SPI Interface EEPROM SS SCK MOSI MISO S VCC I/O C Q D M95040 2 |
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