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AN1782 数据表(PDF) 2 Page - STMicroelectronics |
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AN1782 数据表(HTML) 2 Page - STMicroelectronics |
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2 / 7 page ![]() 2/7 I2C COMMUNICATION BETWEEN STR71X AND M24CXX EEPROM 3 STR71X/M24C08 COMMUNICATION APPLICATION 3.1 HARDWARE CONFIGURATION Two M24C08 memory chips can be addressed by a microcontroller on the same two wire bus by configuring the M24C08 input E2. In this application the M24C08 E0, E1 and E2 inputs are tied to V3.3 via 10K resistor. The M24C08 is divided into four blocks defined by the two LSB bits of the memory address defined on the following: ■ M24C08_Block0 ==> ADDRESS 0xA8 ■ M24C08_Block1 ==> ADDRESS 0xAA ■ M24C08_Block2 ==> ADDRESS 0xAC ■ M24C08_Block3 ==> ADDRESS 0xAE Figure 1. STR71x/M24C08 configuration 3.2 SOFTWARE IMPLEMENTATION In this application note the software modules are developed in C language, with RVDK envi- ronment. The software implemented to manage read and write operations between the STR71x I2C interface and the M24C08 is divided in three parts: – Write: first, the program writes the contents of a predefined buffer to the memory starting from address 0x00 of Block3, M24C02 2 8 1 M24C04 4 4 2 M24C08 8 2 4 M24C016 16 1 8 Device Size (Kbit) Devices per Bus Number of Blocks STR71x M24C08 E2 E0 V3.3 SDA SCL SDA SCL E1 10K 10K 10K 100 100 V3.3 2 |
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