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I2C COMMUNICATION BETWEEN STR71X AND M24CXX EEPROM

– Wait: then, it waits until the write operation is finished,

– Read: finally it reads the data already written.

3.2.1 Write Operation

Before starting the communication, the I2C bus must be in the free state (SCL and SDA must

be HIGH). The write sequence is started by getting control of the bus. This action, which puts

the bus in busy state, is performed by setting the START bit in the Control Register (CR) in

order to generate a START Condition. Then the slave address is written in the Data Register

(DR) with the R/Wbit=0. This causes the address to be sent to the slave. The address trans-

mission check is done by looping on the ENDAD flag in Status Register2 (SR2). This flag is

cleared by writing 0x20 in the Control Register (CR).

Then the master starts sending the data byte by writing it in the Data Register (DR). To

transmit a new data byte, the address or the data byte previously transmitted has to be com-

pleted correctly. The previous transmission check is done by looping on the BTF flag in Status

Register 1 (SR1). This flag is cleared by writing the next byte to be sent in the Data Register.

The first byte to be sent is the start address of the destination of the data.

A maximum of 16 bytes can be written to the M24C08 in a single write cycle.

The write sequence is ended by generating a STOP condition, by setting the STOP bit in the

Control Register (CR). This action releases the bus.

The following flowchart shows the different steps of the write cycle.

Figure 2. Write Operation Flowchart

Begin

End

Generate START Condition

Send Slave Address((R/W)bit=0)

Generate STOP Condition

Send String

Send the EEPROM’s internal

address to write to