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AN2645 数据表(PDF) 23 Page - STMicroelectronics |
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AN2645 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 36 page ![]() AN2645 Block-by-block compatibility analysis 23/36 3.2 Digital I/O This section describes the different aspects of compatibility related to digital I/Os: ● GPIO ports ● High-sink capability ● External interrupts More information related to digital I/O can be found in section 3.3: Timers. 3.2.1 GPIO The basic GPIO structure consists of nine ports named from PA to PI with a maximum number of 68 GPIO pins in the 80-pin package (refer to Table 18). When migrating to packages with lower pin-count, the number of GPIO pins is reduced in consequence. STM8S103K and STM8S903K have three additional GPIO pins compared to other sub- families with the same 32-pin package. This is because they have I/Os instead of VDDIO, VDDA and VSSA. Table 18. Total number of GPIOs in each package I/O port Package size LQFP80 (xxxM) LQFP64 (xxxR) LQFP48 (xxxC) LQFP44 (xxxS) LQFP32 (xxxK)(1) 1. Except STM8S103x and STM8S903x sub-families LQFP32 (STM8S103 & STM8S903) LQFP20 (xxxF) PA 6 6652 3 3 PB 8 8886 8 2 PC 8 7767 7 5 PD 8 8888 8 6 PE 8 8751 1 PF 66 1 1 PG 8 822 PH 8 PI 81 Total 68 523834 25 28 16 |
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