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AN3258 数据表(PDF) 7 Page - STMicroelectronics |
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AN3258 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 16 page ![]() AN3258 HSI calibration Doc ID 17825 Rev 1 7/16 Figure 2. LIN header Usually, the master node uses a crystal or resonator oscillator to generate the correct baud rate. The sync field byte is used by the slave node to synchronize with the master clock. The STM8A/S LINUART peripheral has an automatic resynchronization feature which makes use of the sync byte field to synchronize with the master baud rate. The automatic resynchronization feature measures the sync byte field and automatically adjusts the slave baud rate generator after each LIN sync field reception from the master node (see Figure 3). Figure 3. LIN synch field measurement After each LIN break reception, the time duration between five falling edges on the LIN Rx pin is sampled on the fMASTER clock. The result of this measurement is stored in an internal 19-bit register called SM which is not user accessible. Then, the LIN baud rate divider (LDIV) is automatically updated at the end of the fifth falling edge. Note: fMASTER and TMASTER are the respective system clock frequency and time period of the STM8A/S slave node (please refer to the clock tree figure in the STM8A and STM8S reference manuals) and should not be considered as the frequency of the master node. LIN break LIN synch Identifier Parity bits field field LIN break Break Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Start bit Stop bit Next start bit LIN synch field Measurement = 8.TBR = SM.TMASTER LDIV(n) LDIV(n+1) TBR delim. |
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