AN3258

HSI calibration

Doc ID 17825 Rev 1

9/16

1.4

HSI calibration routine

The calibration routines are written in C language. They include STM8A/S firmware library

functions.

The calibration routine starts with the configuration of the HSI clock prescaler value bits,

HSIDIV[1:0], in the CLK_CKDIVR register. The value programmed in the software example

HSITRIM[3:0] or HSITRIM[2:0], in the CLK_HSITRIMR register are kept at reset value.

The LINUART peripheral is initialized at baud rate 19200 bps, 8 data bits, 1 stop bit and no

parity. LINUART is configured in slave mode (LSLV bit =1) with the automatic

resynchronization feature enabled (LASE bit = 1) and the LIN divider update method

(LDUM) bit = 0. Both LIN header detection(LHDIEN) and LIN receiver (RIEN) interrupts are

enabled. The LINEN bit is set to enable the LIN mode.

When a valid LIN header is received by the LIN slave, the LIN receive interrupt is generated.

Inside the interrupt service routine, if the LIN header detection flag (LHDF) is set,

LDIV_MEAS is read from the BRR1 and BRR2 registers (see Figure 4). Using Equation 4,

calculated by using Equation 5.

Depending on whether the

described in Section 1.1: HSI trimming bits) is written to increase or decrease the HSI

oscillator frequency by one trimming step. When the next sync frame is received, the

procedure is repeated to check and calibrate the HSI oscillator until the trimming value

reaches the upper/lower limit or until the measured

measured with the previous trimming value. The maximum number of valid LIN headers

required to calibrate the HSI oscillator is four if three trimming bits are used and eight if four

trimming bits are used.