AN3371 datasheet(13/45 Pages) STMICROELECTRONICS

13 / 45 page

AN3371

Overview of the STM32 advanced RTC

Doc ID 018624 Rev 5

13/45

The Alarm sub-second can be configured using the mask ss bits in the alarm sub-second

for the mask register and provides an example with the following settings:

●

Select LSE as the RTC clock source (for example LSE = 32768 Hz).

●

Set the Asynchronous prescaler to 127.

●

Set the Synchronous prescaler to 255 (the Calendar clock is equal to 1Hz).

●

Set the alarm A sub-second to 255 (put 255 in the SS[14:0] field).

Note:

The overflow bits in the sub-second register bit (15,16 and 17) are never compared.

Table 6.

Alarm sub-second mask combinations

MASKSS

Alarm A sub-second behavior

Example result

There is no comparison on sub-second for alarm. The alarm is

activated when the second unit is incremented.

The alarm is activated every

1 second

Only the AlarmA_SS[0] bit is compared to the RTC sub-second

The alarm is activated every

(1/128) s

Only the AlarmA_SS[1:0] bit is compared to the RTC sub-second

The alarm is activated every

(1/64) s

Only the AlarmA_SS[2:0] bit is compared to the RTC sub-second

The alarm is activated every

(1/32) s

Only the AlarmA_SS[3:0] bit is compared to the RTC sub-second

The alarm is activated every

(1/16) s

Only the AlarmA_SS[4:0] bit is compared to the RTC sub-second

The alarm is activated every

125 ms

Only the AlarmA_SS[5:0] bit is compared to the RTC sub-second

The alarm is activated every

250 ms

Only the AlarmA_SS[6:0] bit is compared to the RTC sub-second

The alarm is activated every

500 ms

Only the AlarmA_SS[7:0] bit is compared to the RTC sub-second