AN3371 datasheet(22/45 Pages) STMICROELECTRONICS

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Overview of the STM32 advanced RTC

AN3371

22/45

Doc ID 018624 Rev 5

1.8

RTC tamper detection function

The RTC includes n tamper detection inputs. The tamper input active level/edge can be

configured and each one has an individual flag (TAMPxF bit in RTC_ISR register).

A tamper detection event generates an interruption when the TAMPIE bit in RTC_TAFCR

The configuration of the tamper filter, “TAMPFLT bits”, defines whether the tamper detection

is activated on edge (set TAMPFLT to “00“), or on level (TAMPFLT must be different from

“00“).

Note:

The number of tamper “n” depends on products. Each input has a “TAMPxF” individual flag

in the RTC_TAMP register.

1.8.1

Edge detection on tamper input

When the TAMPFLT bits are set to zero, the tamper input detection triggers when either a

rising edge or a falling edge is observed on the corresponding TAMPLEVEL bit.

Detect a Time-stamp

overflow event(3)

By polling on the time-

stamp over flow flag

(TSOVF(4)) in the RTC_ISR

– To clear the flag, write zero on the

TSOVF bit.

– Time-stamp registers (RTC_TSTR

and RTC_TSDR,

RTC_TSSSR(1))

maintain the results of the previous

event.

– If a time-stamp event occurs

immediately after the TSF bit is

supposed to be cleared, then both

TSF and TSOVF bits are set.

1. TSF is set 2 ck_apre cycles after the time-stamp event occurs due to the synchronization

process.

2. To avoid masking a time-stamp event occurring at the same moment, the application must not

write ‘0’ into TSF bit unless it has already read it to‘1’.

3. A time-stamp overflow event is not connected to an interrupt.

4. There is no delay in the setting of TSOVF. This means that if two time-stamp events are close

together, TSOVF can be seen as '1' while TSF is still '0'. As a consequence, it is recommended

to poll TSOVF only after TSF has been set.

Table 11.

Time-stamp features (continued)

What to do

How to do it

Comments

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