DocID018933 Rev 2

13/18

AN3413

Software description

17

Figure 5. Low power mode flowchart

In Standby mode, the device is in its deepest energy saving state. The device enters the

Cortex-M3 deepsleep mode and the voltage regulator is disabled. All oscillators are

switched off. SRAM and register contents are lost with the exception of the RTC registers,

RTC backup registers and Standby circuitry. The device is woken up from this mode by an

external wakeup event generated by the U3 counter invoking a system reset.

MS19816V1

START

LCD disable

RTC clock source None *

RTC clock OFF *

LCD clock OFF

Regulator in Ultra low power mode **)

GPIO Low power config

Disable external counter U3

Configure LP clock

Configure interrupt/event

Switch OFF flash memory ***)

Switch OFF regulator

WFE set to external event from PA0

Enable external counter U3

Wait For Event or

Wait For Interrupt

Event or

Interrupt

occurred?

NO

YES

Clear interrupt / event

Switch ON regulator

Reconfigure clock

END

*) except Stop with RTC

Disable fast wakeup

**) except Sleep mode

***) only for LP RUN, Sleep and LP Sleep