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AN4013

Timer synchronization

3.3

Slave configuration

The slave timer is connected to the master timer through the input trigger. Each ITRx is

connected internally to another timer, and this connection is specific for each STM32

product.

The slave mode can be:



Reset mode: rising edge of the selected trigger input (TRGI) reinitializes the counter

and generates an update of the registers.



Gated mode: the counter clock is enabled when the trigger input (TRGI) is high. The

counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop

of the counter are controlled.



Trigger mode: the counter starts at a rising edge of the trigger TRGI (but it is not

reset). Only the start of the counter is controlled.



External clock mode 1: rising edges of the selected trigger (TRGI) clock the counter.



Combined Reset + Trigger Mode - Rising edge of the selected trigger input (TRGI)

reinitializes the counter, generates an update of the registers and starts the counter.

This mode is present only for STM32F30xC/Bx and STM32F358xC.

To configure a timer in slave mode:

Select the slave mode to be used by writing SMS (Slave Mode Selection) bits in SMCR

Select the internal trigger to be used by writing TS (Trigger selection) bits in SMCR

For more details on using the timer in this mode, refer to the examples provided in the

STM32xx standard peripheral libraries, in the /Project/STM32xx_StdPeriph_Examples/

TIM/Cascade_Synchro, /ExtTrigger_Synchro and /Parallel_Synchro folders.

AN4013 数据表(PDF) 23 Page - STMicroelectronics