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LTC1153 数据表(PDF) 8 Page - Linear Technology |
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LTC1153 数据表(HTML) 8 Page - Linear Technology |
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8 / 16 page ![]() 8 LTC1153 LTC1153 OPERATIO Controlled Gate Rise and Fall Times When the input is switched ON and OFF, the gate is charged by the internal charge pump and discharged in a controlled manner. The charge and discharge rates have been set to minimize RFI and EMI emissions in normal operation. If a short-circuit or current overload condition is encountered, the gate is discharged very quickly (typi- cally a few microseconds) by a large N-channel transistor. Status Output Driver The status circuitry continuously monitors the input and the gate charge control logic. The open-drain output is driven low when the input is turned ON and the breaker is latched off. The status circuitry is reset along with the input latch when the auto-reset circuitry retries the breaker or the input is cycled low. Figure 1. Protecting Resistive Loads Figure 2. Protecting Inductive Loads Large inductive loads (>0.1mH) may require diodes con- nected directly across the inductor to safely divert the stored energy to ground. Many inductive loads have these diodes included. If not, a diode of the proper current rating MOSFET and Load Protection The LTC1153 protects the power MOSFET switch by removing drive from the gate as soon as an over-current condition is detected and breaking the circuit to the load. Resistive and inductive loads can be protected with no external time delay in series with the drain sense pin. High inrush current loads, however, require that the trip delay time be set long enough to start the load but short enough to ensure the safety of the MOSFET. Resistive Loads Loads that are primarily resistive should be protected with as short a delay as possible to minimize the amount of time that the MOSFET switch or the load is subjected to an overload condition. The drain sense circuitry has a built- in trip delay of approximately 10 µs to eliminate false triggering by power supply or load transient conditions. This delay is sufficient to “mask” short load current transients and the starting of a small capacitor (<1 µF) in parallel with the load. The drain sense pin can therefore be connected directly to the drain current sense resistor as shown in Figure 1. Inductive Loads Loads that are primarily inductive, such as relays, sole- noids and stepper motor windings should be protected with as short a delay as possible to minimize the amount of time that the MOSFET is subjected to an overload condition. The built-in 10 µs trip delay will ensure that the breaker is not false-tripped by a supply or load transient. No external delay components are required as shown in Figure 2. S APPLICATI I FOR ATIO IN CT STATUS GND VS DS G SD LTC1153 CT 0.22 µF + 100 µF IRFZ24 15V RLOAD 12 Ω 12V CLOAD ≤ 1µF 0.036 Ω LTC1153 • F01 IN CT STATUS GND VS DS G SD LTC1153 CT 0.22 µF + 100 µF IRFZ24 15V 12V, 1A SOLENOID 12V 1N5400 0.036 Ω LTC1153 • F02 |
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