AN4102

Application description

Doc ID 023129 Rev 1

9/16

1.6.2

Halt mode

In this mode, the CPU, oscillator and peripherals are stopped but the device remains

powered on. The voltage regulator is configured in ultra-low power mode. The device

wakeup is done via an external interrupt.

In Halt mode, the device reaches a deeper level of energy saving by disabling the

oscillators. The device is woken up from this mode by an external interrupt generated by the

U7 counter.

Figure 6.

HALT mode

For further information, refer to the application note "STM8L family power management"

(AN3147).

START

LCD disable

RTC clock source none

RTC clock OFF

LCD clock OFF

LSI disable

Regulator ultra low power mode

GPIO low power config

Disable external counter U7

Halt_Init() function

Enable external counter U7

HALT() instruction

Interrupt

occurred?

NO

YES

END

Starts U7 counter that

controls microcontroller

wakeup

Device in HALT mode

HALT mode