6

LTC1069-1

NC (Pins 3, 6): No Connection. Pins 3 and 6 are not

connected to any internal circuity; they should be prefer-

ably tied to ground.

connected to the inverting input of an op amp through a

43k resistor.

CLK (Pin 5): Clock Input Pin. Any TTL or CMOS clock

source with a square wave output and 50% duty cycle

(

±10%) is an adequate clock source for the device. The

power supply for the clock source should not necessarily

be the filter’s power supply. The analog ground of the filter

should be connected to clock’s ground at a single point

only. Table 1 shows the clock’s low and high level thresh-

old value for a dual or a single supply operation. A pulse

generator can be used as a clock source provided the high

level ON time is greater than 0.42

waves less than 100kHz are not recommended for clock

signal because excessive slow clock rise or fall times

generate internal clock jitter. The maximum clock rise or

fall is 1

µs. The clock signal should be routed from the right

side of the IC package to avoid coupling into any input or

output analog signal path. A 1k resistor between the clock

source and the clock input pin (5) will slow down the rise

and fall times of the clock to further reduce charge cou-

pling, Figure 1.

Table 1. Clock Source High and Low Thresholds

POWER SUPPLY

HIGH LEVEL

LOW LEVEL

Dual Supply =

±5V

1.5V

0.5V

Single Supply = 10V

6.5V

5.5V

Single Supply = 5V

1.5V

0.5V

Single Supply = 3.3V

1.2V

0.5V

filter and it can source or sink 1mA. Driving coaxial cables

or resistive loads less than 20k will degrade the total

harmonic distortion of the filter. When evaluating the

device’s dynamic range, a buffer is required to isolate the

filter’s output from coax cables and instruments.

Temperature Behavior

The power supply current of the LTC1069-1 has a positive

temperature coefficient. The GBW product of its internal

op amps is nearly constant and the speed of the device

does not degrade at high temperatures. Figures 3a, 3b and

3c show the behavior of the maximum passband of the

device for various supplies and temperatures. The filter,

Figure 3a

Figure 3b

Figure 3c

FREQUENCY (kHz)

0.5

6.5

1069-1 F03a

2.5

4.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

1.5

3.5

5.5

7.5

FREQUENCY (kHz)

0.5

6.5

1069-1 F03b

2.5

4.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

1.5

3.5

5.5

7.5 8.5 9.5 10.5

especially at

±5V supply, has a passband behavior which

is nearly temperature independent.

Clock Feedthrough

The clock feedthrough is defined as the RMS value of the

clock frequency and its harmonics that are present at the

filter’s output pin (8). The clock feedthrough is tested with

FREQUENCY (kHz)

1

13

1069-1 F03c

59

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

3

7

11

15