7

LTC1069-1

the input pin (4) shorted to the AGND pin and depends on

PC board layout and on the value of the power supplies.

With proper layout techniques the values of the clock

feedthrough are shown on Table 2.

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

Any parasitic switching transients during the rise and fall

edges of the incoming clock are not part of the clock

feedthrough specifications. Switching transients have fre-

quency contents much higher than the applied clock; their

amplitude strongly depends on scope probing techniques

as well as grounding and power supply bypassing. The

clock feedthrough can be reduced, if bothersome, by

adding a single RC lowpass filter at the output pin (8) of the

LTC1069-1.

Wideband Noise

The wideband noise of the filter is the total RMS value of

the device’s noise spectral density and determines the

operating signal-to-noise ratio. Most of the wideband

noise frequency contents lie within the filter passband.

The wideband noise cannot be reduced by adding post

filtering. The total wideband noise is nearly independent of

the clock frequency and depends slightly on the power

Table 2. Clock Feedthrough

CLOCK FEEDTHROUGH

3.3V

10

5V

40

±5V

160

Table 3. Wideband Noise

WIDEBAND NOISE

3.3V

100

5V

108

±5V

112

Aliasing

Aliasing is an inherent phenomenon of sampled data

systems and it occurs for input frequencies approaching

the sampling frequency. The internal sampling frequency

of the LTC1069-1 is 100 times its cutoff frequency. For

input of an LTC1069-1 operating with a 100kHz clock, a

2kHz, 28

Table 4 shows details.

INPUT FREQUENCY

OUTPUT LEVEL

OUTPUT FREQUENCY

(Relative to Input)

(Aliased Frequency)

(kHz)

(dB)

(kHz)

96

(or 104)

– 90.0

4.0

97

(or 103)

– 86.0

3.0

98

(or 102)

– 71.0

2.0

985. (or 101.5)

– 56.0

1.5

99

(or 101)

– 1.1

1.0

99.5 (or 100.5)

– 0.21

0.5

supply voltage (see Table 3). The clock feedthrough speci-

fications are not part of the wideband noise.

Single 3.3V Supply Operation with Output Buffer

Single 5V Operation with Power Shutdown

1

2

3

4

8

7

6

5

NC

CLK

AGND

NC

0.1

µF

0.47

µF

1069-1 TA05

LTC1069-1

500kHz

3.3V

0V

–

+

1/2 LT1366

3.3V

0.1

µF

1

2

3

4

8

7

6

5

NC

CLK

AGND

NC

0.1

µF

0.47

µF

SHUTDOWN

ON

5V

1069-1 TA04

LTC1069-1

750kHz

5V

0V

CMOS LOGIC