LTC1522CS8 datasheet(6/8 Pages) LINER

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LTC1522

APPLICATIONS INFORMATION

Figure 2. Ultralow Quiescent Current (<2.1

µA) Regulated Supply

SHDN

GND

C–

VIN

VOUT

C+

LTC1522

FROM MPU

µF

VOUT

±4%

SHDN PIN WAVEFORMS:

LOW IQ MODE (2Hz TO 100Hz, 95% TO 98% DUTY CYCLE)

IOUT ≤ 100µA

VOUT LOAD ENABLE MODE

(IOUT = 100µA TO 20mA)

0.22

µF

VIN

2.7V TO 5V +

1522 F02

INPUT VOLTAGE (V)

0.0

2.0

4.0

6.0

5.0

1522 F03a

2.0

3.0

4.0

Figure 3a. No-Load ICC vs Input Voltage for Circuit in Figure 3

OUTPUT CURRENT (

µA)

100

1000

1522 F03b

100

SHDN ON PULSE WIDTH = 200

µs

COUT = 10µF

The LTC1522 must be out of shutdown for a minimum

duration of 200

µstoallowenoughtimetosensetheoutput

and keep it in regulation. A 2Hz, 98% duty cycle signal will

keep VOUT in regulation under no-load conditions. As the

VOUT load current increases, the frequency with which the

part is taken out of shutdown must also be increased to

prevent VOUT from drooping below 4.8V during the OFF

phase (see Figure 3b). A 100Hz 98% duty cycle signal on

the SHDN pin ensures proper regulation with load currents

as high as 100

µA. When load current greater than 100µA

is needed, the SHDN pin must be forced low as in normal

operation. The typical no-load supply current for this

circuit with VIN = 3V is only 2.1µA.

Each time the LTC1522 comes out of shutdown, the part

delivers a minimum of one clock cycle worth of charge to

the output. Under high VIN(>3.3V)and/orlowIOUT(<10µA)

conditions, this behavior may cause a net excess of charge

to be delivered to the output capacitor if a high frequency

signal is used on the SHDN pin (e.g., 50Hz to 100Hz).

Under such conditions, VOUT will slowly drift positive and

may even go out of regulation. To avoid this potential

problem in the low IQ mode, it is necessary to switch the

part in and out of shutdown at the minimum allowable

frequency (refer to Figure 3b) for a given output load.

Figure 3b. Maximum SHDN OFF Time vs Output Load Current

for Ultralow IQ Operation

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