LTC1772CS6 datasheet(4/16 Pages) LINER

4 / 16 page

LTC1772

FUNCTIONAL DIAGRA

OPERATIO

(Refer to Functional Diagram)

Main Control Loop

The LTC1772 is a constant frequency current mode switch-

ing regulator. During normal operation, the external

P-channel power MOSFET is turned on each cycle when

the oscillator sets the RS latch (RS1) and turned off when

the current comparator (ICMP) resets the latch. The peak

inductor current at which ICMP resets the RS latch is

controlled by the voltage on the ITH/RUN pin, which is the

output of the error amplifier EAMP. An external resistive

divider connected between VOUT and ground allows the

EAMP to receive an output feedback voltage VFB. When the

load current increases, it causes a slight decrease in VFB

relative to the 0.8V reference, which in turn causes the

ITH/RUN voltage to increase until the average inductor

current matches the new load current.

The main control loop is shut down by pulling the ITH/RUN

pin low. Releasing ITH/RUN allows an internal 0.5µA

current source to charge up the external compensation

network. When the ITH/RUN pin reaches 0.35V, the main

control loop is enabled with the ITH/RUN voltage then

pulled up to its zero current level of approximately 0.7V.

As the external compensation network continues to charge

SWITCHING

LOGIC AND

BLANKING

CIRCUIT

–

0.15V

0.5

µA

0.3V

SLEEP

OVP

SHORT-CIRCUIT

DETECT

BURST

CMP

SHDN

1.2V

1772FD

VREF

60mV

VREF

0.8V

VIN

RS1

VOLTAGE

REFERENCE

SLOPE

COMP

ICMP

FREQ

FOLDBACK

OSC

SENSE–

VIN

–

EAMP

VFB

–

PGATE

VIN

ITH/RUN

VIN

0.35V

VREF

0.8V

–

SHDN

CMP

0.3V

GND

–

UNDERVOLTAGE

LOCKOUT

VIN

LTC1772CS6 数据表(PDF) 4 Page - Linear Technology

LTC1772CS6 数据表(HTML) 4 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

数据表下载

链接网址

LTC1772CS6 数据表(PDF) 4 Page - Linear Technology

LTC1772CS6 数据表(HTML) 4 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

数据表 下载

链接网址

数据表下载