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LTC1772CS6 数据表(PDF) 7 Page - Linear Technology |
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LTC1772CS6 数据表(HTML) 7 Page - Linear Technology |
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7 / 16 page ![]() 7 LTC1772 APPLICATIONS INFORMATION or Kool Mu ® cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design cur- rent is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Molypermalloy (from Magnetics, Inc.) is a very good, low loss core material for toroids, but it is more expensive than ferrite. A reasonable compromise from the same manu- facturer is Kool Mu. Toroids are very space efficient, especially when you can use several layers of wire. Because they generally lack a bobbin, mounting is more difficult. However, new designs for surface mount that do not increase the height significantly are available. Power MOSFET Selection An external P-channel power MOSFET must be selected for use with the LTC1772. The main selection criteria for the power MOSFET are the threshold voltage VGS(TH) and the “on” resistance RDS(ON), reverse transfer capaci- tance CRSS and total gate charge. Since the LTC1772 is designed for operation down to low input voltages, a sublogic level threshold MOSFET (RDS(ON) guaranteed at VGS = 2.5V) is required for applications that work close to this voltage. When these MOSFETs are used, make sure that the input supply to the LTC1772 is less than the absolute maximum VGS rating, typically 8V. The required minimum RDS(ON) of the MOSFET is gov- erned by its allowable power dissipation. For applications that may operate the LTC1772 in dropout, i.e., 100% duty cycle, at its worst case the required RDS(ON) is given by: R P Ip DS ON P OUT MAX DC () () % = = () +() 100 2 1 δ where PP is the allowable power dissipation and δp is the temperature dependency of RDS(ON). (1 + δp) is generally given for a MOSFET in the form of a normalized RDS(ON) vs temperature curve, but δp = 0.005/°C can be used as an approximation for low voltage MOSFETs. In applications where the maximum duty cycle is less than 100% and the LTC1772 is in continuous mode, the RDS(ON) is governed by: R P DC I p DS ON P OUT () ≅ () + () 2 1 δ where DC is the maximum operating duty cycle of the LTC1772. Output Diode Selection The catch diode carries load current during the off-time. The average diode current is therefore dependent on the P-channel switch duty cycle. At high input voltages the diode conducts most of the time. As VIN approaches VOUT the diode conducts only a small fraction of the time. The most stressful condition for the diode is when the output is short-circuited. Under this condition the diode must safely handle IPEAK at close to 100% duty cycle. Therefore, it is important to adequately specify the diode peak current and average power dissipation so as not to exceed the diode ratings. Under normal load conditions, the average current con- ducted by the diode is: I VV VV I D IN OUT IN D OUT = − + The allowable forward voltage drop in the diode is calcu- lated from the maximum short-circuit current as: V P I F D SC MAX ≈ () where PD is the allowable power dissipation and will be determined by efficiency and/or thermal requirements. Kool Mu is a registered trademark of Magnetics, Inc. |
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