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RT9742ENGJ5F 数据表(PDF) 7 Page - Richtek Technology Corporation |
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RT9742ENGJ5F 数据表(HTML) 7 Page - Richtek Technology Corporation |
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7 / 19 page ![]() RT9742 7 DS9742-00 July 2015 www.richtek.com © Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. The thermal shutdown protection will react at high Ambient Temperature or low VIN due to RDS(ON) variation. Please refer to Application Information and Typical Operating Characteristics. Parameter Symbol Test Conditions Min Typ Max Unit EN/EN Threshold Logic_High Voltage VIH VIN = 2.7V to 6V 2 -- -- V Logic_Low Voltage VIL VIN = 2.7V to 6V -- -- 0.8 EN/EN Input Current EN/EN I VEN = 0V, EN V = 5V 0.5 -- 0.5 A Output Leakage Current ILEAKAGE VEN = 0V, RLOAD = 0 -- 0.5 1 A Output Turn-On Rise Time TON_RISE 10% to 90% of VOUT Rising -- 300 -- s Output Resist FLG ance FLG R ISINK = 1mA -- 10 -- FLG Off Current FLG_OFF I FLG V = 5V -- 0.01 1 A FLG Delay Time TD From fault condition to FLG Assertion -- 10 -- ms Shutdown Auto-Discharge Resistance RDischarge VEN = 0V, VEN = 5V -- 10 -- Under-Voltage Lockout VUVLO VIN Rising -- -- 2.4 V Under-Voltage Hysteresis VUVLO VIN Decreasing -- 0.1 -- V Thermal Shutdown Protection TSD -- 140 -- °C Thermal Shutdown Hysteresis TSD -- 20 -- °C |
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