ICS570

MULTIPLIER AND ZERO DELAY BUFFER

ZDB AND MULTIPLIER

IDT™ / ICS™ MULTIPLIER AND ZERO DELAY BUFFER

3

ICS570

REV K 073007

Pin Descriptions

External Components

The ICS570 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be connected

close to the part to minimize lead inductance. No external power supply filtering is required for this device. A 33

Ω

series terminating resistor can be used next to each output pin.

Recommended Circuit

Pin

Number

Pin

Name

Pin

Type

Pin Description

1

S1

Input

Select 1 for output clock. Connect to GND, VDD, or float per decoding

2

VDD

Power

Connect to +3.3 V (ICS570B). Connect to +5.0 V (ICS570A).

3

GND

Power

Connect to ground.

4

ICLK

Input

Reference clock input.

5

FBIN

Input

Feedback clock input.

6

S0

Input

Select 0 for output clock. Connect to GND, VDD, or float per decoding

7

CLK

Output

Clock output per table above.

8

CLK/2

Output

Clock output per table above. Low skew divide by two of pin 7 clock.

CLK

CLK/2

FBIN

S1

VDD

GND

Input

S0

ICLK

x2 Mode (S1, S0 = 1, 1)

CLK Feedback

CLK

CLK/2

ICLK

x2 Mode (S1, S0 = 1, 0)

CLK/2 Feedback

CLK

CLK/2