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ICS570 数据表(PDF) 5 Page - Integrated Device Technology

部件名 ICS570
功能描述  8-pin SOIC package
PDF  11 Pages
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制造商  IDT [Integrated Device Technology]
网页  http://www.idt.com
标志 IDT - Integrated Device Technology

ICS570 数据表(HTML) 5 Page - Integrated Device Technology

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ICS570
MULTIPLIER AND ZERO DELAY BUFFER
ZDB AND MULTIPLIER
IDT™ / ICS™ MULTIPLIER AND ZERO DELAY BUFFER
5
ICS570
REV K 073007
Clock Period Jitter Tables (ICS570B)
All jitter values are considered typical measured at 25
° C with 27Ωtermination resistor and 15 pF loads on both CLK
and CLK/2. The feedback is from CLK/2 to FBIN. Note that if an output is unused, it should be left unconnected to
improve output jitter on the active output clocks.
Absolute and One Sigma Jitter (ps)
Absolute and One Sigma Jitter (ps)
Absolute and One Sigma Jitter (ps)
1
0
75
2x
±155
110
1x
±55
20
1
M
4.6875
32x
±165
120
16x
±55
20
1
1
37.5
4x
±160
110
2x
±50
20
CLK = 50M
CLK/2 = 25M
S
S
CLKIN
Multiplier
P to P
1 sigma
Multiplier
P to P
1 sigma
0
M
8.333
6x
±110
80
3x
±55
20
0
1
6.25
8x
±125
90
4x
±50
20
M
0
3.125
16x
±130
90
8x
±55
20
M
M
4.167
12x
±120
90
6x
±55
20
M
1
2.5
20x
±115
90
10x
±55
20
1
0
25
2x
±130
50
1x
±55
20
1
M
1.5625
32x
±120
90
16x
±55
20
1
1
12.5
4x
±120
60
2x
±55
20
CLK = 100M
CLK/2 = 50M
S
S
CLKIN
Multiplier
P to P
1 sigma
Multiplier
P to P
1 sigma
0
M
16.667
6x
±100
70
3x
±45
20
0
1
12.5
8x
±100
70
4x
±45
20
M
0
6.25
16x
±110
80
8x
±45
20
M
M
8.333
12x
±100
70
6x
±45
20
M
1
5
20x
±105
70
10x
±40
20
1
0
50
2x
±90
60
1x
±40
20
1
M
3.125
32x
±95
70
16x
±45
20
1
1
25
4x
±105
70
2x
±60
20
CLK = 150M
CLK/2 = 75M
S
S
CLKIN
Multiplier
P to P
1 sigma
Multiplier
P to P
1 sigma
0
M
25
6x
±115
70
3x
±50
20
0
1
18.375
8x
±120
80
4x
±50
20
M
0
9.375
16x
±130
90
8x
±50
20
M
M
12.5
12x
±130
90
6x
±45
20



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