DATA SHEET

Differential Clock/Data Multiplexer

ICS831724I

ICS831724AKI REVISION A MAY 16, 2013

1

©2013 Integrated Device Technology, Inc

General Description

The ICS831724I is a high-performance, differential HCSL clock/data

multiplexer and fanout buffer. The device is designed for the

multiplexing and fanout of high-frequency clock and data signals. The

device has two differential, selectable clock/data inputs. The selected

input signal is distributed to four low-skew differential HCSL outputs.

Each input pair accepts HCSL, LVDS and LVPECL levels. The

ICS831724I is characterized to operate from a 3.3V power supply.

Guaranteed input, output-to-output and part-to-part skew

characteristics make the ICS831724I ideal for those clock and data

distribution applications demanding well-defined performance and

repeatability. The ICS831724I supports the clock multiplexing and

distribution of PCI Express Generation 1, 2, and 3 clock signals.

Features

LVDS, LVPECL.

910 11 12 13 14 15 16

32 31 30

29 28

27 26 25

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

nOED

CLK0

nCLK0

CLK1

nCLK1

nOEA

nc

nOEC

nc

nc

nc

nc

SEL

nc

Block Diagram

QA

nQA

QB

nQB

QC

nQC

QD

nQD

IREF

CLK0

nCLK0

CLK1

nCLK1

SEL

nOEA

nOEB

nOEC

nOED

Pulldown

Pullup

Pullup

Pullup

Pullup

Pullup/down

Pulldown

Pullup/down

Pulldown

0

1

Pin Assignment

ICS831724I

32-Lead VFQFN

5mm x 5mm x 0.925mm package body

K Package

Top View