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IRMCK341 数据表(PDF) 11 Page - International Rectifier |
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IRMCK341 数据表(HTML) 11 Page - International Rectifier |
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11 / 36 page  IRMCK341 www.irf.com © 2007 International Rectifier 11 I 2C Interface SCL/SO-SI Output, I2C clock output, or SPI data SDA/CS0 Input/output, I2C Data line or SPI chip select 0 I 2C/SPI Interface and OTP power SCL/SO-SI/VPP Output, I2C clock output, or SPI data or OTP programming power SDA/CS0 Input/output, I2C data line or SPI chip select 0 P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock output P3.0/INT2/CS1 Input/output port 3.0, can be configured as INT2 input or SPI chip select 1 4.2 Motion Peripheral Interface Group PWM PWMUH Output, PWM phase U high side gate signal PWMUL Output, PWM phase U low side gate signal PWMVH Output, PWM phase V high side gate signal PWMVL Output, PWM phase V low side gate signal PWMWH Output, PWM phase W high side gate signal PWMWL Output, PWM phase W low side gate signal Fault GATEKILL Input, upon assertion, this negates all six PWM signals, programmable logic sense 4.3 Analog Interface Group AVDD Analog power (1.8V) AVSS Analog power return AREF 0.6V buffered output CMEXT Unbuffered 0.6V, input to the AREF buffer, capacitor needs to be connected. IFB+ Input, Operational amplifier positive input for shunt resistor current sensing IFB- Input, Operational amplifier negative input for shunt resistor current sensing IFBO Output, Operational amplifier output for shunt resistor current sensing AIN0 Input, Analog input channel 0 (0 – 1.2V), typically configured for DC bus voltage input AIN1 Input, Analog input channel 1 (0 – 1.2V), needs to be pulled down to AVSS if unused AIN2 Input, Analog input channel 2 (0 – 1.2V), needs to be pulled down to AVSS if unused AIN3 Input, Analog input channel 3 (0 – 1.2V), needs to be pulled down to AVSS if unused AIN4 Input, Analog input channel 4 (0 – 1.2V), needs to be pulled down to AVSS if unused |
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