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AM4376 数据表(PDF) 29 Page - Texas Instruments

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部件名 AM4376
功能描述  AM437x Sitara??Processors
PDF  261 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM4376 数据表(HTML) 29 Page - Texas Instruments

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AM4376, AM4377, AM4378, AM4379
www.ti.com
SPRS851B – JUNE 2014 – REVISED APRIL 2015
Table 4-10. Pin Attributes (ZDN Package) (continued)
BALL
BALL
BALL RESET
BUFFER
PULL
BALL
RESET
PIN NAME [2]
SIGNAL NAME [3]
MODE [4]
TYPE [5]
RESET
REL. MODE
POWER [9]
HYS [10]
STRENGTH
UP/DOWN
IO CELL [13]
NUMBER [1]
REL.
STATE [6]
[8]
(mA) [11]
TYPE [12]
STATE [7]
H20
clkreq
clkreq
0x0
O
OFF
PU
Mode0
VDDSHV3
Yes
6
PU/PD
LVCMOS
gpio0_24
0x7
IO
N1
ddr_a0
ddr_a0
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
L1
ddr_a1
ddr_a1
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
L2
ddr_a2
ddr_a2
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
P2
ddr_a3
ddr_a3
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
P1
ddr_a4
ddr_a4
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
R5
ddr_a5
ddr_a5
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
R4
ddr_a6
ddr_a6
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
R3
ddr_a7
ddr_a7
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
R2
ddr_a8
ddr_a8
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
R1
ddr_a9
ddr_a9
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
M6
ddr_a10
ddr_a10
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
T5
ddr_a11
ddr_a11
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
T4
ddr_a12
ddr_a12
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
N5
ddr_a13
ddr_a13
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
T3
ddr_a14
ddr_a14
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
T2
ddr_a15
ddr_a15
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
K1
ddr_ba0
ddr_ba0
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
K2
ddr_ba1
ddr_ba1
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
K3
ddr_ba2
ddr_ba2
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
N3
ddr_casn
ddr_casn
0x0
O
PU
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
M2
ddr_ck
ddr_ck
0x0
O
PD
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
M3
ddr_cke0
ddr_cke0
0x0
O
PD
Mode0
VDDS_DDR
YES
8
PU/PD
LVCMOS/HST
L/HSUL_12
Copyright © 2014–2015, Texas Instruments Incorporated
Terminal Configuration and Functions
29
Submit Documentation Feedback
Product Folder Links: AM4376 AM4377 AM4378 AM4379



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