HCS410 datasheet(19/36 Pages) MICROCHIP

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HCS410

Preliminary

DS40158C-page 19

3.0

EEPROM ORGANIZATION AND

CONFIGURATION

The HCS410 has nonvolatile EEPROM memory which

is used to store user programmable options. This infor-

mation includes encoder keys, serial number, and up to

64-bits of user information.

The HCS410 has two modes in which it operates as

speciﬁed by the conﬁguration word. In the ﬁrst mode

the HCS410 has a single encoder key which is used for

encrypting the code hopping portion of a CH Mode

transmission and generating a response during IFF val-

idation. Seed transmissions are allowed in this mode.

In the second mode the HCS410 is a transponder

device with two encoder keys.

The two different operating modes of the HCS410 lead

to different EEPROM memory maps.

In IFF1 mode, the HCS410 can act as a code hopping

encoder with Seed transmission, and as an IFF token

with one key.

In IFF2 mode, the HCS410 is able to act as a code hop-

ping transmitter and an IFF token with two encoder

keys.

3.1

Encoder Key 1 and 2

The 64-bit encoder key1 is used by the transmitter to

create the encrypted message transmitted to the

receiver in Code Hopping Mode. An IFF operation, can

use encoder key1 or key2 to generate the response to

a challenge received. The key(s) is created and pro-

grammed at the time of production using a key genera-

tion algorithm. Inputs to the key generation algorithm

are the serial number or seed for the particular

transmitter being used and a secret manufacturer’s

code. While a number of key generation algorithms are

supplied by Microchip, a user may elect to create their

own method of key generation. This may be done pro-

viding that the decoder is programmed with the same

means of creating the key for decryption purposes. If a

seed is used (CH Mode), the seed will also form part of

the input to the key generation algorithm.

3.2

Discrimination Value and Overﬂow

The discrimination value forms part of the code hop-

ping portion of a code hopping transmission. The least

signiﬁcant 10 bits of the discrimination value are typi-

cally set to the least signiﬁcant bits of the serial number.

The most signiﬁcant 2 bits of the discrimination value

are the overﬂow bits (OVR1: OVR0). These are used to

extend the range of the synchronization counter. When

the synchronization counter wraps from FFFF16 to

000016 OVR0 is cleared and the second time a wrap

occurs OVR1 is cleared.

Once cleared, the overﬂow bits cannot be set again,

thereby creating a permanent record of the counter

overﬂow.

3.3

16-bit Synchronization Counter

This is the 16-bit synchronization counter value that is

used to create the code hopping portion for transmis-

sion. This value will be changed after every transmis-

sion. The synchronization counter is not used in IFF

mode.

IFF1 Mode

64-bit Encoder Key 1

64-bit Seed/Transport Code

(SEED0, SEED1, SEED2, SEED3)

32-bit Serial Number

(SER0, SER1)

64-bit User Area

(USR0, USR1, USER2, USR3)

10-bit Discrimination Value and 2 Overﬂow Bits.

16-bit Synchronization Counter

Conﬁguration Data

IFF2 Mode

64-bit Encoder Key 1

64-bit Encoder Key 2/Transport Code

32-bit Serial Number

(SER0, SER1)

64-bit User EEPROM

(USR0, USR1, USER2, USR3)

10-bit Discrimination Value and 2 Overﬂow Bits.

16-bit Synchronization Counter

Conﬁguration Data

*Patents have been applied for.

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